[racket] Dr. Racket for FPGA development

On Fri, Sep 16, 2011 at 12:07 PM, Neil Van Dyke <neil at neilvandyke.org> wrote:
> Maybe also a possibility is to use layers of Racket syntax transformers over
> a lower layer that simply writes out a conventional VHDL or whatever file.
>  This would be a more convenient way to implement higher-level languages for
> FPGAs than using conventional parser tools and such.  You're using the
> Racket "syntax-rules", "syntax-parse", etc. to implement a compiler, but the
> person using this compiler is not actually programming in Racket (unless
> those layers of syntax transformers also implement the Racket language).

I'm currently in the process of doing this for the 65816 processor.
This is a 16-bit processor most popularly used in the Super Nintendo
Entertainment System.

Take a look at

https://github.com/jeapostrophe/lll/tree/master/snes

The assembly primitives write out the appropriate opcodes and interact
with the label resolve and memory layout part of the compiler.
Assembly "macros" are just Racket functions that call many opcode
functions (for example, ConvertX and the use of for). There are also
Racket macros that implement things like WHILE and UNLESS.

I'm trying to start at the opcode level and slowly build up a normal
language with only local macros and no global analysis. The next step
is take opcodes like:

(LDA (addr #x0100))
(AND #b00001111)

and create a generic SET! form so I can write it like:

(SET! A x-coord)
(SET! A (bitwise-and A #b00001111))

to be less opcode-oriented, but still restrict SET! to operations that
are single opcodes. For example,

(SET! A (+ X Y))

is not possible on the 65816.

Jay

p.s. Why the 65816? It's really simple to understand the whole thing
and the constraints enforce tight code. The x86 is too complicated for
me right now and it would be too cushy, I think.

-- 
Jay McCarthy <jay at cs.byu.edu>
Assistant Professor / Brigham Young University
http://faculty.cs.byu.edu/~jay

"The glory of God is Intelligence" - D&C 93