[racket-dev] mips/ia64 build failures due to unaligned memory access (was: Re: Build failure on specific PPC systems)

From: Matthew Flatt (mflatt at cs.utah.edu)
Date: Sat Sep 17 09:53:28 EDT 2011

At Sat, 17 Sep 2011 09:10:44 -0400, James Vega wrote:
> mips and ia64 both fail with unaligned access, although in different
> places.
> ia64's build failure

I think Racket won't work on ia64 because we never worked out how to
deal with its multiple stacks.

> mips' build failure
> ,--------------------------------------
> |make[3]: Leaving directory `/home/jamessan/racket-5.1.3+dfsg1/build'
> |env CFLAGS="-g -Wall  -Wall     " LDFLAGS=""  racket/racket3m -X 
> "/home/jamessan/racket-5.1.3+dfsg1/debian/tmp/usr/share/racket/collects" -N 
> "raco setup" -l- setup -j 1 --no-docs --no-zo   --no-user
> |raco setup: bootstrapping from source...
> |make[2]: *** [install-3m] Bus error (core dumped)
> `--------------------------------------
> and backtrace
> ,--------------------------------------
> |(gdb) bt
> |#0  0x0060675c in syncing_ready (s=0x2dbf3220, sinfo=0x7fe4efc0)
> |    at /home/jamessan/racket-5.1.3+dfsg1/src/racket/gc2/../src/thread.c:5661

I'm not sure, but here are two things to try:

 * In "src/racket/gc2/newgc.c" around line 2601, force
   `generations_available' to 0:

       newgc->generations_available = 0;

   If something is going wrong with the write barrier, then disabling
   generational GC should allow the build to continue.

 * In "src/racket/gc2/sighand.c" around line 122, change




   to check whether page-protection failures trigger SIGBUS instead of
   SIGSEGV. I think this is unlikely to be the problem, but it may be
   worth checking.

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