[racket-dev] Build failure on specific PPC systems

From: David Lowe (doctorjlowe at verizon.net)
Date: Thu Aug 25 08:28:59 EDT 2011

On 24 Aug, 2011, at 8:31 PM, Lennart Sorensen wrote:

>>> What differences are there between the G5 and G4 that could cause this
>>> discrepancy?  What information can I provide or debugging can I perform
>>> to help determine the problem?
>> I believe that the IBM 970 used in the G5 has one unusual behaviour
>> compared to most other powerpc chips.  Unlike most other powerpcs the
>> 970 can not switch endianess.  See the note about virtual PC here:
>> http://en.wikipedia.org/wiki/PowerPC#Design_features
>> So that could very well be breaking other code too if it tries to take
>> advantage of that feature.  Virtual PC tried to use little endian mode
>> to make emulating x86 code a lot more efficient since the data didn't
>> have to be manipulated very much.  Since the 970 couldn't be switched
>> to little endian mode, virtual PC couldn't use that trick anymore.
>> I could see a JIT compiler that wants to be fast on powerpc trying to
>> use that too, ad hence breaking on the 970.
> Oh and in case it helps anything, here is a failed build on a power6+ machine of 5.1.1:

	There is another difference: the 970 has an AltiVec implementation by IBM that is somewhat different than Motorola's.  I don't know about the power6+, but it seems likely to be the case there as well.  Try compiling with an additional "-maltivec" flag.

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